SystemVerilog Assertions Committee Home Page

 

 

Charter
The SV-AC is the technical subcommittee of the IEEE P1800 Working Group that is tasked with maintaining and extending the assertion support within the SystemVerilog language.

 

Patent Policy

 

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Special Committee

 

Active Email Discussions:

See full discussion details in email archive. (Scroll to bottom!)

 

Meeting and Status Information

  • Next Meeting Date: 2008-06-30
  • Agenda: TBD

 

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Last Meeting Minutes (2008-06-23):

 

Minutes of IEEE P1800 SV-AC meeting #2007-55

Written by: Dmitry Korchemny

 

Date: 2008-06-23

Time: 16:00 UTC (9:00 PDT)

 

Dial-in information:


 

Toll number: +1 916-356-2663

Toll free number (US): 888-875-9370 (U.S. toll-free)

Bridge: 2, Passcode: 4207988

 

 

Attendance Record:


Legend:

x = attended

- = missed

r = represented

. = not yet a member

v = valid voter (2 out of last 3 or 3/4 overall)

n = not a valid voter

t = chair eligible to vote only to make or break a tie

 

New PAR, attendance re-initialized on 2006-08-22:

 

vx--x--xxxxxxxxx-xxxxxxxxxxxxxxxxxxxxxxxx-xxxxxxxxxxxxxxxxxxxxxxxx-xx Doron Bustan (Intel)

v-xx-xxxx-xxxxxxxxxxxxxxx--xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx-x Eduard Cerny (Synopsys)

n-----------------------------------------x-xxx---------x-x-xxx-x---x Surrendra Dudani (Synopsys)

vxxxxx-xxxxxxxxxxx-xxxxxxxxx-xxxxxx-xxxxxxxxx-xx-xxxxx-xxx-xxx------- Yaniv Fais (Freescale)

v-xxxxxxxxxxxxxxxxxxxxxx--xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx John Havlicek (Freescale)

txxxx-xxxxx-xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxrxxxxxxxxxxxxx-xxx Dmitry Korchemny (Intel – Chair)

n-----xxx--xx-x-xxxxxxxxx-xxxxxxxxx-xxx-x--xx--xxxxx----------xx-xxxx Manisha Kulshrestha (Mentor Graphics)

n----------------x-x------------------------------------------------- Ah-Lam Lee (Qualcomm)

n-------------------------------------------------xxxxx-------x-xx-x- Jiang Long (Mentor Graphics)

n[--x-xx-x--------------------x------------x--xxx.....................] Joseph Lu (Altera)

n[--------------x-x--xxxxxxxxxxxxxxxxxxx..............................] Johan Martensson (Jasper)

n----------------------------------------------x--x-xx--xx-xxxxxxx-x- Hillel Miller (Freescale)

vxxxxxxxx-xxxxxxxxxxxxxxx-xxxx-xxxxxxxxxxxxxxxxxxx-xxxxxxxx-xxxxxxxxx Lisa Piper (Cadence)

v[xxxxxxx-xxxxxx-xxxxxxxxxx-x-x-xx-xxxxxxx-x-xxxxx-x..................] Erik Seligman (Intel)

n--------------------------x-x----x--------xxxx-----xxxx-xx---------- Tej Singh (Mentor Graphics)

v-xx-xxxx-x-x-x-xxx-xxxxxx-x-xxxxxx--xxxxxxxx-xxxxxxxxxxxxxxxxxxxxxxx Bassam Tabbara (Synopsys)

v[xxxxxxxxxxxxxxxxxxxxxxxxxxxx-xxxxxxxxxxxxx-xxxxxxxxxx...............] Tom Thatcher (Sun Microsystems – Co-Chair)

|------------------------------------------------------ attendance on 2008-06-23

|-------------------------------------------------------- voting eligibility on 2008-06-23

 

Agenda:


 

- Reminder of IEEE patent policy.

See: http://standards.ieee.org/board/pat/pat-slideset.ppt

 

- Draft6 review

 

. DB reviewed 1757 and found issues related to 2100.

. DK reviewed 2250, 2168, 1683 and 1682.

. DK and DB found several cases when the coloring was done relative to other Mantis items, rather than relative to Draft5.

. DK will update 1682 to define \equiv before use.

 

Action items:

  • Everybody to review the implemented Mantis items they own:

. JH: 1734, 1667, 1668, 2175, 1687, 1567

. YF: 2100

. DB: 1932, 2336, 1800, 1757

. ES: 2005

. DK: 2250, 2168, 1683, 1683, 1681, 2188, 2171, 2090, 2069, 2033, 1677, 1591, 1460,

. EC: 1729, 1901, 1737, 1769, 1758, 1731, 1674, 1550

. LP: 1698, 1601, 1648, 2246, 2091, 1987, 1722, 1686, 1549, 1466, 1768, 1735, 1704, 928

. MK: 2335, 2150, 1641, 1361

. BT: 1641, 1599

 

Due date: 2008-06-30

 

  • Review the Draft6 chunk - this is crossreview, and the assignment is independent of the previous one:

. EC: 16 (beginning) - 16.3

. DB: 16.4-16.7

. ES: 16.8-16.10

. TT: 16.11-16.14

. LP, YF: 16.15

. DK: 16.18 - 16 (end)

. MK: Clause 19, Annex Q

. BT: Clauses 36, 38, Annex O

. JH: Annex A

 

Due date: 2008-06-30

 

 

- 2173 - Add case construct for properties.

Addressing SV-BC feedback.

 

. YF will publish the updated version of 2173, following the SV-BC comments, and DK will call to vote.

 

Opens.

 

Next meeting will be Monday, June 30.

 

 

 

Latest Status Update (2008-05-27):

IEEE 1800 SV-AC Status Summary 2008-05-27


 

Last status summary: 2008-04-30

 

- The following Mantis items have been resolved or re-resolved since the

last status summary:

 

. 1503 VPI diagram of propertyinst has no vpiArgument

 

 

- The following Mantis items have been approved by the champions since

the last status summary:

 

 

- The following Mantis items have been approved by the working group

since the last status summary

 

. 2336 VPI part of 1757

. 1698 The description of sampled value functions is insufficient

. 1757 Property resets: accept_on(b) P, reject_on(b) P

. 1769 Elaboration time user assertion and error reporting tasks

. 1932 Introduce LTL and other temporal operators

. 2246 VPI definitions of assertkill need modification

. 2250 VPI changes related to 1932

. 2150 use of automatic variables in action block and subroutine calls should not be allowed

 

 

- The following Mantis items are waiting on work or approval by other

committees:

 

 

. SV-BC 1806 Introduce "restrict property" verification statement

. SV-BC 2173 Add case construct for properties.

 

 

- The following Mantis items are waiting on approval of other items:

 

. 2326 Case property statement VPI

. 2237 VPI additions for 1667

. 2327 2173 adds property case, need to add vacuity definition and multi clocking behavior in it


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